PFM - PULSE FREQUENCY MODULATION Techniques in SMPS IC
PULSE FREQUENCY MODULATION (PFM) In
DC-DC Switching Regulator.
Subject
:
SMPS Designing / Power Electronics / DC-DC switching Regulator
Jaydeep Shah (EC Engineer)
Email : radhey04ec@gmail.com
PDF DOWNLOAD LINK : CLICK HERE --> PDF FILE
CHAPTER – BASIC TERMINOLOGY OF PFM SMPS IC
Why this consept important?? à Now a days designers focus on the design
of the DC-DC converter to ensure that it consumes as little current as possible during no-load conditions. All
DC-DC converters, even during standby,can consume significant quiescent current
(Quiescent Current can be defined as the amount
of current used by an
IC when in a Quiescent state.
The Quiescent state
being any period of time when the IC is in either a no load or non-switching
condition).
One commercial power-supply module (EX: the RECOM®
R-78A3.3-1OR), for example, draws about 7mA under no-load conditions. However,
with some attention to topology and careful design, an isolated DC-DC converter
module with a no-load current drain of less than 1mA can be implemented.
These converters (Available in market) traditionally
employ pulse-width-modulation controllers. However, PWM controllers always have an active oscillator (RC), even when there is no
load, and that oscillator continually draws current from the battery , This is
one of the disadvantage of PWM Controller.
Before starting PFM, Need to understand what is PFM ?….
PWM
Control :
The oscillator frequency
is constant and the pulse width (ON time) changes according to the amount
of output load.
VFM
Control
The pulse width (ON time) is constant and the oscillator frequency changes according to the amount of output load.
|
|
Oscillator Frequency
|
Pulse Width
(Duty) |
Light Load Condition
|
Noise
Suppression*1 |
|
|
Efficiency
|
Ripple Voltage
|
||||
|
VFM Control
|
Change
|
Constant
|
Good
|
High
|
Difficult
|
|
PWM Control
|
Constant
|
Change
|
Not Good
|
Low
|
Easy
|
n
Noise
suppression of VFM control can be difficult
because oscillator frequency is inconsistent and it affects noise level.
n
Noise
suppression of PWM control is relatively easier
because oscillator frequency is constant and it does not affect noise level.
Now
a days –>
DC-DC converters include the products that are only operated by PWM control and
the products that can be automatically switched between PWM mode and VFM mode according
to the load condition.
Two
Methods for Feed backing the Output :
A transformer provides the isolation, but
the challenge is to feed back the voltage reference from the secondary side to
the primary side without breaking the isolation. The most common approach
solves the problem by using either an auxiliary winding or an optocoupler.
Function
of Leading Edge blanking (LEB) :
Leading edge blanking circuit on current
sense input could remove the signal glitch due to snubber circuit diode reverse
recovery and thus greatly reduces the external component count and system cost
in the design.
n
Each time the
power MOSFET is switched on, a turn-on spike will inevitably occur at the Sense
pin, which would disturb the internal signal from the sampling of the RSENSE.
There is a 300ns ( This time period
depends on manufacturer and internal structure – near 30 ms in SMPS IC) leading
edge blanking time built in to avoid the effect of the turn-on spike, and the
power MOSFET cannot be switched off during the moment. So that the conventional
external RC filtering on sense input is no longer required.
n
In
short during this time period power supply does not
|
Sometimes, the RC delay circuit (Low
pass Filter) is insufficient for removing the false noise signals at the input
of the PWM comparator. when the gate drive switches from low to high and
the parasitic capacitance from the gate to the source of Q1 is charging.
Depending on the values of Gate Resistor and Current sense resistor , a
large-enough leading-edge voltage spike could falsely trigger the PWM
comparator at the ISENSE pin. This problem is common in isolated dc/dc power
converters.
To remove false triggering from the PWM comparator, it is desirable
to blank out the leading-edge spikes that appear on the current-sense signal.Using
three to five more components (like BJT and RC network) with RC low pass
filter we can implemented this circuit, and now this is internal features of many
IC.
·
Quasi Resonant :
Quasi-resonant switching, compared to the
traditional continuous and discontinuous modes of operation in a flyback
converter, cuts turn-on losses at the
power switch, thus increasing efficiency and lowering device temperatures.
Its disadvantage, that of higher losses at light loads, is eliminated by the
frequency-clamp circuit used in today's controllers and integrated power
switches.
Quasi-resonant conversion works in quite a
different way than the well-known resonant converter to cut losses. Now
consider Figure 1, which shows the waveforms at the drain in a current-mode
flyback converter operating in the discontinuous conduction mode. Only one gate
pulse has been applied. During the first time interval, the drain current ramps
up until the desired current level is reached. The power switch then turns off.
The leakage inductance in the flyback transformer rings with the node
capacitance. This causes a leakage inductance spike, which is limited by a
clamp circuit. After the inductive spike has diminished, the drain voltage
returns to the input voltage plus the reflected output voltage. The drain
voltage would immediately drop to the bus voltage when the current in the
output diode drops to zero if the effect of the primary inductance and the node
capacitance were ignored.
In quasi-resonant switching, the device
does not have a fixed switching frequency. Instead, the controller waits for
one of the troughs in the drain voltage and then switches on.
DOWNLOAD CLICK HERE
Thanks :
Jaydeep Shah
Electronics & Communication Engineer
Ahmedabad - India
Email : radhey04ec@gmail.com
